Dielectric engineered symmetric underlap double gate tunnel FET (DGTFET): An investigation towards variation of dielectric materials. (August 2016)

• Record Type: Journal Article
• Authors: Mallikarjunarao, ; Ranjan, Rajeev; Pradhan, K.P.; Sahu, P.K.
• Is Part Of: Superlattices and microstructures. Volume 96(2016)
• Page Start: 226
• Page End: 233
• Publication Date: 2016-08
• Subjects: Band-to-Band Tunneling -- Underlap length -- Single-k spacer -- Sub-threshold swing; Superlattices as materials -- Periodicals; Microstructure -- Periodicals; Semiconductors -- Periodicals; Superréseaux -- Périodiques; Microstructure (Physique) -- Périodiques; Semiconducteurs -- Périodiques; 621.38152
• DOI: 10.1016/j.spmi.2016.05.035
• Languages: English
• ISSNs: 0749-6036

Abstract

Abstract: In this article, an underlap silicon n-channel Tunnel Field Effect Transistor (n-TFET) i.e., symmetric single-k spacer (SSS) Double Gate N-TFET (DGTFET) is proposed to improve the performance of the device by using different spacer materials. A detailed investigation has been made on the proposed device characteristics with the help of extensive 2-D TCAD simulations. It is demonstrated that an optimized underlap length is chosen for a significant on-state current (Ion ) without deteriorating the off-state current (Ioff ) and sub-threshold swing (SS). The proposed model with different spacer materials has been extensively analyzed by using transfer characteristics, output characteristics, and analog/RF characteristics. The structure is optimized based on the comparison among various performance metrics like Ion, Ioff, SS, on-off ratio (Ion /Ioff ), threshold (or) cut-off frequency (fT ), and intrinsic delay with considering different spacer materials like SiO2 (k = 3.9), Si3 N4 (k = 7.5), and HfO2 (k = 25). Highlights: A novel device named symmetric underlap Double Gate TFET is proposed. The underlap length is optimized based on performance metrics. A comparative analysis is carried out by considering various spacer materials. DC, Analog and RF Figures of Merit (FOMs) are analyzed. The proposed device is outperformed for HfO2 spacer case with 2 nm length.