A novel ultra steep dynamically reconfigurable electrostatically doped silicon nanowire Schottky Barrier FET. (May 2016)

• Record Type: Journal Article
• Authors: Singh, Sangeeta; Sinha, Ruchir; Kondekar, P.N.
• Is Part Of: Superlattices and microstructures. Volume 93(2016)
• Page Start: 40
• Page End: 49
• Publication Date: 2016-05
• Subjects: Symmetric structure -- Schottky Barrier FET (SB-FET) -- Dopant-free -- Dynamic reconfigurability -- Random dopant fluctuations (RDF); Superlattices as materials -- Periodicals; Microstructure -- Periodicals; Semiconductors -- Periodicals; Superréseaux -- Périodiques; Microstructure (Physique) -- Périodiques; Semiconducteurs -- Périodiques; 621.38152
• DOI: 10.1016/j.spmi.2016.02.039
• Languages: English
• ISSNs: 0749-6036

Abstract

Abstract: In this paper, an ultra steep, symmetric and dynamically configurable, electrostatically doped silicon nanowire Schottky FET (E-SiNW-SB-FET) based on dopant-free technology is investigated. It achieves the ultra steep sub-threshold slope (SS) due to the cumulative effect of weak impact-ionization induced positive feedback and electrostatic modulation of Schottky barrier heights at both source and drain terminals. It consists of axial nanowire heterostructure (silicide-intrinsic silicon-silicide) with three independent all-around gates, two gates are polarity control gates for dynamically reconfiguring the device polarity by modulating the effective Schottky barrier heights and a control gate switches the device ON and OFF. The most interesting features of the proposed structure are simplified fabrication process as the state-of-the-art for ion implantation and high thermal budget no more required for annealing. It is highly immune to process variations, doping control issues and random dopant fluctuations (RDF) and there are no mobility degradation issues related to high doping. A calibrated 3-D TCAD simulation results exhibit the SS of 2 mV/dec for n-type E-SiNW-SB-FET and 9 mV/dec for p-type E-SiNW-SB-FET for about five decades of current. Further, it resolves all the reliability related issues of IMOS as hot electron effects are no more limiting our device performance. It offers significant drive current of the order of 10 −5 -10 −4 A and magnificently high I ON / I OFF ratio of ∼10 8 along with the inherent advantages of symmetric device structure for its circuit realization. Graphical abstract: Figure: (a) 3-D view, (b) schem ati c cross-sectional view and (c) circuit symb ol of n/p-E-SiNW-SB-FET. In this article an ultra steep, symmetric and dynamically configurable, electrostatically doped silicon nanowire Schottky FET (E-SiNW-SB-FET) based on dopant-free technology is investigated. It achieves the ultra steep sub-threshold slope (SS) due to the cumulative effect of weak impact-ionization induced positive feedback and electrostatic modulation of Schottky barrier heights at both source and drain terminals. A calibrated 3-D TCAD simulation results exhibit the SS of 2 mV/dec for n-E-SiNW-SB-FET and 9 mV/dec for p-E-SiNW-SB-FET for about five decades of current. Highlights: Investigated an ultra steep, symmetric and dynamically configurable, E-SiNW-SB-FET. Steep SS is due to the cumulative effect of weak impact-ionization induced positive feedback and electrostatic modulation of Schottky barrier heights at both terminals. The polarity of the devices can be changed on-the-fly. A calibrated 3-D TCAD simulation re sults exhibit the SS of 2 mV/dec for n-E-SiNW-SB-FET and 9 mV/dec for p-E-SiNW-SB-FET for about five decades of current.