A 20 nm robust single-ended boost-less 7T FinFET sub-threshold SRAM cell under process–voltage–temperature variations. (May 2016)
- Record Type:
- Journal Article
- Title:
- A 20 nm robust single-ended boost-less 7T FinFET sub-threshold SRAM cell under process–voltage–temperature variations. (May 2016)
- Main Title:
- A 20 nm robust single-ended boost-less 7T FinFET sub-threshold SRAM cell under process–voltage–temperature variations
- Authors:
- Kushwah, C.B.
Vishvakarma, S.K.
Dwivedi, D. - Abstract:
- Abstract: A novel 20 nm FinFET based 7T SRAM cell is presented. Proposed 7T SRAM cell involves the breaking-up of feedback between the true storing nodes which enhances the write-ability of the cell at ultra-low voltage power supply without boosted supply and write assist. The read decoupling and feedback cutting makes proposed 7T SRAM cell more robust to process variations in sub-threshold regime. For proposed 7T SRAM cell, the mean and standard-deviation ( μ / σ ) ratio of hold static noise margin is 31.5% higher than that of conventional iso-area 5T SRAM cell at 0.5 V VDD. The 7T SRAM cell has 66.4% higher μ / σ of read margin as that of 5T SRAM cell at 0.25 V VDD. The write static noise margin of 7T SRAM cell is ~50% of VDD for all VDD values whereas 5T SRAM cell fails to write. During write '0', the proposed cell consumes only 0.11× power as that of 5T SRAM cell at 0.8 V VDD. The read operation of 7T SRAM cell consumes 0.34× lesser power than 5T SRAM cell read operation for all values of bit-line capacitances at 0.2 V VDD. At 0.2 V VDD, the 7T SRAM cell has 0.46× lower write '0' delay as that of 5T SRAM cell. The write delay of 7T SRAM cell is 0.32× lower as that of 5T SRAM cell at 0.8 V VDD. The techniques used by the proposed 7T SRAM cell allow it to operate at ultra-low voltage supply without any write assist in 20 nm FinFET technology node.
- Is Part Of:
- Microelectronics journal. Volume 51(2016)
- Journal:
- Microelectronics journal
- Issue:
- Volume 51(2016)
- Issue Display:
- Volume 51, Issue 2016 (2016)
- Year:
- 2016
- Volume:
- 51
- Issue:
- 2016
- Issue Sort Value:
- 2016-0051-2016-0000
- Page Start:
- 75
- Page End:
- 88
- Publication Date:
- 2016-05
- Subjects:
- Boost-less -- FinFET -- Process–voltage–temperature -- SRAM -- Sub-threshold -- Ultra-low power
Microelectronics -- Periodicals
Microélectronique -- Périodiques
Microelectronics
Electronic journals
Journals - contents and abstracts
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621.3805 - Journal URLs:
- http://catalog.hathitrust.org/api/volumes/oclc/5877621.html ↗
http://www.sciencedirect.com/science/journal/00262692 ↗
http://www.intute.ac.uk/sciences/cgi-bin/fullrecord.pl?handle=lesa.1012319367 ↗
http://www.elsevier.com/journals ↗
http://www.elsevier.com/homepage/elecserv.htt ↗ - DOI:
- 10.1016/j.mejo.2016.02.010 ↗
- Languages:
- English
- ISSNs:
- 0959-8324
- Deposit Type:
- Legaldeposit
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- Available online (eLD content is only available in our Reading Rooms) ↗
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- British Library DSC - 5758.973000
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