A 1.36 μW 312–315 MHz synchronized-OOK receiver for wireless sensor networks using 65 nm SOTB CMOS technology. (March 2016)

• Record Type: Journal Article
• Authors: Hoang, Minh-Thien; Sugii, Nobuyuki; Ishibashi, Koichiro
• Is Part Of: Solid-state electronics. Volume 117(2016)
• Page Start: 161
• Page End: 169
• Publication Date: 2016-03
• Subjects: Synchronized-OOK modulation -- Low power receiver -- Wireless sensor network -- SOTB CMOS; Semiconductors -- Periodicals; Semiconducteurs -- Périodiques; 621.38152
• DOI: 10.1016/j.sse.2015.11.016
• Languages: English
• ISSNs: 0038-1101

Abstract

Abstract: The paper presents a receiver design operating at 312–315 MHz frequency band for wireless sensor networks. The proposed architecture uses synchronized on–off-keying (S-OOK) modulation scheme, which includes clock information together with data, providing self-synchronization ability for the receiver without a separate clock and data recovery circuit. In addition, a new technique is also proposed to reduce active time of the RF font-end for better energy efficiency. The receiver architecture is verified by using discrete RF modules and FPGAs, then VLSI design is carried out on 65 nm Silicon-On-Thin-Buried-Oxide (SOTB) CMOS technology and simulated using SPICE models to illustrate effectiveness of the proposed architecture. Post-layout simulation shows −58.5 dBm sensitivity with 1.36 μW and 8.39 μW power consumption corresponding to 10 kbps and 100 kbps data rate, respectively.