Electrical characterization of Random Telegraph Noise in Fully-Depleted Silicon-On-Insulator MOSFETs under extended temperature range and back-bias operation. (March 2016)

• Record Type: Journal Article
• Authors: Marquez, Carlos; Rodriguez, Noel; Gamiz, Francisco; Ruiz, Rafael; Ohata, Akiko
• Is Part Of: Solid-state electronics. Volume 117(2016)
• Page Start: 60
• Page End: 65
• Publication Date: 2016-03
• Subjects: Random Telegraph Noise -- MOSFET -- Silicon-On-Insulator -- Reliability -- Back-bias -- Buried oxide; Semiconductors -- Periodicals; Semiconducteurs -- Périodiques; 621.38152
• DOI: 10.1016/j.sse.2015.11.022
• Languages: English
• ISSNs: 0038-1101

Abstract

Abstract: Random Telegraph Noise (RTN) has been studied in Ultra-Thin Fully-Depleted Silicon-On-Insulator transistors. A modified Time Lag Plot algorithm has been used to identify devices with a single active trap. The physical characteristics of the trap have been extracted based on Shockley–Read–Hall models, revealing the possible trends of capture and emission times of the trap according to its physical and energetic position. The effect of the temperature on the characteristic times has been studied in the range from 248 to 323 K validating the results obtained at room temperature. Finally, the impact of back-bias on the RTN fluctuation has been modelled through the Lim–Fossum interface coupling relationships, allowing to predict accurately the experimental results.