High performance a‐IGZO thin‐film transistors with mf‐PVD SiO2 as an etch‐stop‐layer. Issue 1 (16th April 2014)

• Record Type: Journal Article
• Authors: Nag, Manoj; Steudel, Soeren; Bhoolokam, Ajay; Chasin, Adrian; Rockele, Maarten; Myny, Kris; Maas, Joris; Fritz, Thomas; Trube, Jutta; Groeseneken, Guido; Heremans, Paul
• Is Part Of: Journal of the Society for Information Display. Volume 22:Issue 1(2014:Jan.)
• Page Start: 23
• Page End: 28
• Publication Date: 2014-04-16
• Subjects: Information display systems -- Periodicals; 621.38154205
• DOI: 10.1002/jsid.212
• Languages: English
• ISSNs: 1071-0922

Abstract

<abstract abstract-type="main"> <title>Abstract</title> <p>In this work, we report on high‐performance bottom‐gate top‐contact (BGTC) amorphous‐Indium‐Gallium‐Zinc‐Oxide (a‐IGZO) thin‐film transistor (TFT) with SiO₂ as an etch‐stop‐layer (ESL) deposited by medium frequency physical vapor deposition (mf‐PVD). The TFTs show field‐effect mobility (μ_FE) of 16.0 cm²/(V.s), sub‐threshold slope (SS⁻¹) of 0.23 V/decade and off‐currents (I_OFF) &lt; 1.0 pA. The TFTs with mf‐PVD SiO₂ ESL deposited at room temperature were compared with TFTs made with the conventional plasma‐enhanced chemical vapor deposition (PECVD) SiO₂ ESL deposited at 300 °C and at 200 °C. The TFTs with different ESLs showed a comparable performance regarding μ_FE, SS⁻¹, and I_OFF, however, significant differences were measured in gate bias‐stress stability when stressed under a gate field of +/−1 MV/cm for duration of 10⁴ s. The TFTs with mf‐PVD SiO₂ ESL showed lower threshold‐voltage (V_TH) shifts compared with TFTs with 300 °C PECVD SiO₂ ESL and TFTs with 200 °C PECVD SiO₂ ESL. We associate the improved bias‐stress stability of the mf‐PVD SiO₂ ESL TFTs to the low hydrogen content of the mf‐PVD SiO₂ layer, which has been verified by Rutherford‐Back‐Scattering‐Elastic‐Recoil‐Detection technique.</p> </abstract>