3D‐Transistor Array Based on Horizontally Suspended Silicon Nano‐bridges Grown via a Bottom‐Up Technique. (30th January 2014)

• Record Type: Journal Article
• Authors: Oh, Jin Yong; Park, Jong‐Tae; Jang, Hyun‐June; Cho, Won‐Ju; Islam, M. Saif
• Is Part Of: Advanced materials. Volume 26:Number 12(2014)
• Page Start: 1929
• Page End: 1934
• Publication Date: 2014-01-30
• Subjects: Materials -- Periodicals; Chemical vapor deposition -- Periodicals; 620.11
• DOI: 10.1002/adma.201304245
• Languages: English
• ISSNs: 0935-9648

Abstract

<abstract abstract-type="graphical" xml:lang="en" id="adma201304245-abs-0001"> <title> <x xml:space="preserve">Abstract</x> </title> <p> <bold>Integrated surround‐gate field‐effect‐transistors</bold> enabled by bottom‐up synthesis of nano‐bridges are demonstrated. Horizontally oriented silicon nano‐bridge devices are fabricated avoiding the rigorous processes for aligning and contacting nanowires grown via a bottom‐up technique. Evaluation of electrical properties and a memory device application of the transistors are presented. <boxed-text content-type="graphic" position="anchor" orientation="portrait"><graphic position="anchor" mimetype="image" xlink:href="ark:/27927/pgg4xfgjh7m" orientation="portrait" xlink:type="simple" xmlns:xlink="http://www.w3.org/1999/xlink" /></boxed-text></p> </abstract>