On-Chip Current Sensors for Reliable, Secure, and Low-Power Integrated Circuits. (©2020)

• Record Type: Book
• Further Information: Note: Rodrigo Possamai Bastos, Frank Sill Torres.
• Other Names: Bastos, Rodrigo Possamai; Torres, Frank Sill
• Contents: Intro; Preface; Acknowledgments; Abstract; Contents; List of Abbreviations; List of Figures; List of Tables; About the Authors; 1 Effects of Transient Faults in Integrated Circuits; 1.1 Context of Transient Faults for Integrated Circuit Reliability and Security; 1.2 Transient Faults Induced by Environmental Perturbations; 1.3 Transient Faults Induced by Intentional Perturbations; 1.4 Electrical-Level Effects of Transient Faults in Integrated Circuits; 1.5 Logical-Level Effects of Transient Faults in Integrated Circuit Systems; 1.5.1 Harmful Effects of Transient Faults on SynchronousCircuits 1.5.2 Harmful Effects of Transient Faults on QDI Asynchronous Circuits1.5.3 Harmless Effects of Transient Faults; 1.5.4 Failures: The Effects of Soft Errors; 1.5.5 Harmful Effects of Long-Duration Transient Faults; 1.5.6 Harmful Effects of Multiple Transient Faults; 1.6 Conclusions; 2 Effectiveness of Hardware-Level Techniques in Detecting Transient Faults; 2.1 Techniques for Concurrent Error Detection; 2.1.1 Spatial Redundancy; 2.1.2 Temporal Redundancy; 2.1.3 Transition Detector-Based Techniques; 2.1.4 Built-In Current Sensors 2.2 Method for Evaluation of Concurrent Error Detection Techniques2.2.1 Analysis of Injected Transient-Fault Effects; 2.2.2 Profiles of Injected Transient Faults; 2.2.3 Evaluation Metrics; 2.3 Comparative Analysis of Techniques for Detection of Transient Faults; 2.3.1 Description of Simulation Experiments; 2.3.2 Comparative Analysis for Scenario 5; 2.3.3 Global Comparative Analysis; 2.4 Conclusions; 3 Architectures of Body Built-In Current Sensors for Detection of Transient Faults; 3.1 Fundamentals and History of Built-In Current Sensors 3.2 State-of-the-Art Architectures of Body Built-In Current Sensors3.2.1 Single BBICS Architectures; 3.2.2 BBICS Architectures of Neto et al.; 3.2.3 BBICS Architectures of Zhang et al.; 3.2.4 Modular BBICS Architectures; 3.2.5 Dynamic BBICS Architectures of Simionovski and Wirth; 3.2.6 Optimal Dynamic BBICS Architectures; 3.3 Reference Sensitivity of a Flip-Flop in Detecting Transient Faults; 3.3.1 Experiments for Analyzing the Sensitivity of a Flip-Flop in Detecting Transient Faults; 3.3.2 Results and Analysis of the Sensitivity of a Flip-Flop in Detecting Transient Faults 3.4 Analysis and Comparison of Sensor Sensitivities in Detecting Transient Faults3.4.1 Experiments for Sizing Sensor Architectures; 3.4.2 Experiments for Analyzing the Sensitivities of Sensor Architectures in Detecting Transient Faults; 3.4.3 Comparative Analysis of Sensor Sensitivities in Detecting Transient Faults; 3.4.4 Influence of Process and Temperature Variations on the Sensor Detection Sensitivity; 3.4.5 Influence of the Monitored Subcircuit Area on the Sensor Detection Sensitivity; 3.5 Estimation of Sensor Area Overhead Imposed on the Monitored Subcircuit Area
• Publisher Details: Cham : Springer
• Publication Date: 2020
• Copyright Date: 2020
• Extent: 1 online resource (187 pages)
• Subjects: 621.3815; Integrated circuits -- Design and construction; Systems on a chip; Integrated circuits -- Design and construction; Systems on a chip; Electronic books
• Languages: English
• ISBNs: 9783030293536
• Related ISBNs: 303029353X; 9783030293529
• Notes: Note: Print version record.
• Access Rights: Legal Deposit; Only available on premises controlled by the deposit library and to one user at any one time; The Legal Deposit Libraries (Non-Print Works) Regulations (UK).
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