Three-dimensional integrated circuit design. (2010)

• Record Type: Book
• Further Information: Note: Vasilis F. Pavlidis, Eby G. Friedman.
• Other Names: Pavlidis, Vasilis F, 1976-; Friedman, Eby G
• Contents: Chapter 1. Introduction; Chapter 2. Manufacturing of 3-D Packaged Systems; Chapter 3. 3-D Integrated Circuit Fabrication Technologies; Chapter 4. Interconnect Prediction Models; Chapter 5. Physical Design Techniques for 3-D ICs; Chapter 6. Thermal Management Techniques; Chapter 7. Timing Optimization for Two-Terminal Interconnects; Chapter 8. Timing Optimization for Multi-Terminal Interconnects; Appendix A: Enumeration of Gate Pairs in a 3-D IC; Appendix B: Formal Proof of Optimum Single Via Placement; Appendix C: Proof of the Two-Terminal Via Placement Heuristic; Appendix D: Proof of Condition for Via Placement of Multi-Terminal Nets; References
• Publisher Details: Place of publication not identified : Morgan Kaufmann
• Publication Date: 2010
• Extent: 1 online resource (336 pages)
• Subjects: 621.3815; Three-dimensional integrated circuits -- Design and construction
• Languages: English
• ISBNs: 9780080921860; 0080921868
• Access Rights: Legal Deposit; Only available on premises controlled by the deposit library and to one user at any one time; The Legal Deposit Libraries (Non-Print Works) Regulations (UK).
• Access Usage: Restricted: Printing from this resource is governed by The Legal Deposit Libraries (Non-Print Works) Regulations (UK) and UK copyright law currently in force.