1. Area‐ and power‐efficient iterative single/double‐precision merged floating‐point multiplier on FPGA. Issue 4 (22nd May 2017) Authors: Zhang, Hao; Chen, Dongdong; Ko, Seok‐Bum Journal: IET computers & digital techniques Issue: Volume 11:Issue 4(2017) Page Start: 149 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗