1. A fast-locking all-digital PLL with dynamic loop gain control and phase self-alignment mechanism for sub-GHz IoT applications. (6th March 2020) Authors: Yang, Wei-Bin; Wang, Hsi-Hua; Chang, Hsin-I; Lo, Yu-Lung Journal: Japanese journal of applied physics Issue: Volume 59:Number SG(2020) Page Start: Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗