1. A low jitter multiplying delay-locked loop with static phase offset elimination applied to time-to-digital converter. (December 2020) Authors: Wu, Jin; Chen, Shuang; Hu, Kang; Zheng, Lixia; Sun, Weifeng Journal: Microelectronics journal Issue: Volume 106(2020) Page Start: Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗