621. An optimal device sizing for a performance-driven and area-efficient subthreshold cell library for IoT applications. (October 2019) Authors: Sharma, Priyamvada; Jain, Poorvi; Das, Bishnu Prasad Journal: Microelectronics journal Issue: Volume 92(2019) Page Start: Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
622. An optimal linear system approximation of nonlinear fractional-order memristor–capacitor charging circuit. (May 2016) Authors: Semary, Mourad S.; Abdel Malek, Hany L.; Hassan, Hany N.; Radwan, Ahmed G. Journal: Microelectronics journal Issue: Volume 51(2016) Page Start: 58 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
623. An optimized through-via bottom-up method for simultaneous-filling TSVS of different aspect-ratios and its potential application on high-frequency passive interposer. (July 2020) Authors: Zhang, Weibo; Gu, Jiebin; Xu, Gaowei; Luo, Le; Li, Xinxin Journal: Microelectronics journal Issue: Volume 101(2020) Page Start: Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
624. An output node split CMOS logic for high-performance and large capacitive-load driving scenarios. (February 2018) Authors: Rafiee, M.; Ghaznavi-Ghoushchi, M.B. Journal: Microelectronics journal Issue: Volume 72(2018) Page Start: 109 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
625. An RRAM-based MLC design approach. (June 2017) Authors: Bagheri-Soulla, A.A.; Ghaznavi-Ghoushchi, M.B. Journal: Microelectronics journal Issue: Volume 64(2017) Page Start: 9 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
626. An ultra-high-speed hardware accelerator for image reconstruction and stereo rectification on event-based camera. (January 2022) Authors: Zhang, Yu; He, Tao; Peng, Lefeng; Chang, Yi; Huang, Kai; Chen, Gang Journal: Microelectronics journal Issue: Volume 119(2021) Page Start: Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
627. An ultra-low power multiplier using multi-valued adiabatic logic in 65 nm CMOS process. (August 2018) Authors: Yuejun, Zhang; Dailu, Ding; Zhao, Pan; Pengjun, Wang; Qiaoyan, Yu Journal: Microelectronics journal Issue: Volume 78(2018) Page Start: 26 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
628. An ultra-low power, reconfigurable, aging resilient RO PUF for IoT applications. (October 2019) Authors: Khan, Sajid; Shah, Ambika Prasad; Gupta, Neha; Chouhan, Shailesh Singh; Pandey, Jai Gopal; Vishvakarma, Santosh Kumar Journal: Microelectronics journal Issue: Volume 92(2019) Page Start: Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
629. An ultra-low-power bulk-driven subthreshold super class-AB rail-to-rail CMOS OTA with enhanced small and large signal performance suitable for large capacitive loads. (September 2021) Authors: Ghosh, Sougata; Bhadauria, Vijaya Journal: Microelectronics journal Issue: Volume 115(2021) Page Start: Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
630. An ultra-low-power CNFET based dual VDD ternary dynamic Half Adder. (January 2021) Authors: Vidhyadharan, Abhay S.; Vidhyadharan, Sanjay Journal: Microelectronics journal Issue: Volume 107(2020) Page Start: Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗