An optimal device sizing for a performance-driven and area-efficient subthreshold cell library for IoT applications. (October 2019)

• Record Type: Journal Article
• Authors: Sharma, Priyamvada; Jain, Poorvi; Das, Bishnu Prasad
• Is Part Of: Microelectronics journal. Volume 92(2019)
• Publication Date: 2019-10
• Subjects: Internet of things -- Inverse narrow width effect -- Reverse short channel effect -- Subthreshold standard cell library -- Ultra-low power circuit; Microelectronics -- Periodicals; Microélectronique -- Périodiques; Microelectronics; Electronic journals; Journals - contents and abstracts; Periodicals; 621.3805
• DOI: 10.1016/j.mejo.2019.104613
• Languages: English
• ISSNs: 0959-8324

Abstract

Abstract: Ultra-low power design techniques specifically subthreshold designs, play a vital role in Internet of things systems that survive on limited power budget or harvested energy sources. In this paper, the width and length of a transistor operating at subthreshold region are optimized considering the nano-scale effects such as reverse short channel effect and inverse narrow width effect, which improves performance, reduces area, minimizes sensitivity to process variation and reduces energy consumption. A subthreshold standard cell library consisting of 45 standard cells is designed. The physical synthesis of ISCAS′85 benchmark circuits and a floating point unit shows that energy savings in area-mapped design are up to 23% whereas area savings in performance-mapped design are up to 30%. The measurement results from a test chip fabricated in industrial 130 nm technology demonstrate a performance improvement of up to 27%, reduction in delay variability of up to 24% and energy savings of 18%.