1. Rules for the preparation of detail specifications for fusible link programmable read-only memories of assessed quality (full assessment level). (15th October 1981) Authors: British Standards Institution, Record Type: Book Extent: 1 online resource (19 pages) View Content: Available online (eLD content is only available in our Reading Rooms) ↗
2. Rules for the preparation of detail specifications for integrated circuits of assessed quality: TTL binary memory circuits. General application category. (1st December 1975) Authors: British Standards Institution, Record Type: Book Extent: 1 online resource (20 pages) View Content: Available online (eLD content is only available in our Reading Rooms) ↗
3. Integrated circuits. Memory devices pin configurations. (15th September 1999) Authors: British Standards Institution, Record Type: Book Extent: 1 online resource (24 pages) View Content: Available online (eLD content is only available in our Reading Rooms) ↗
4. Specification for harmonized system of quality assessment for electronic components. Blank detail specification. MOS read/write static memories silicon monolithic circuits. (15th May 1987) Authors: British Standards Institution, Record Type: Book Extent: 1 online resource (18 pages) View Content: Available online (eLD content is only available in our Reading Rooms) ↗