1. DMR +: An efficient alternative to TMR to protect registers in Xilinx FPGAs. (August 2016) Authors: Reviriego, P.; Demirci, M.; Tabero, J.; Regadío, A.; Maestro, J.A. Journal: Microelectronics and reliability Issue: Volume 63(2016) Page Start: 314 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
2. DMR +: An efficient alternative to TMR to protect registers in Xilinx FPGAs. (August 2016) Authors: Reviriego, P.; Demirci, M.; Tabero, J.; Regadío, A.; Maestro, J.A. Journal: Microelectronics and reliability Issue: Volume 63(2016) Page Start: 314 Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗