1. A Fully Integrated System‐on‐Chip Design with Scalable Resistive Random‐Access Memory Tile Design for Analog in‐Memory Computing. (1st May 2022) Authors: Cai, Fuxi; Yen, She-Hwa; Uppala, Apurva; Thomas, Luke; Liu, Tianchi; Fu, Peter; Zhang, Xiaofeng; Low, Ambrose; Kamalanathan, Deepak; Hsu, Joe; Ayyagari-Sangamalli, Buvna Journal: Advanced intelligent systems Issue: Volume 4:Number 8(2022) Page Start: n/a Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗