1. A 33.33 Gb/s/wire pin-efficient 1.06 pJ/bit wireline transceiver based on CNRZ-5 for Chiplet in 28 nm CMOS. (December 2022) Authors: Lai, Mingche; Zhang, Geng; Lv, Fangxu; Zheng, Xuqiang; Wang, Heming; Lv, Dongbin; Xu, Chaolong; Qi, Xingyun Journal: Microelectronics journal Issue: Volume 130(2022) Page Start: Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗