1. Performance Analysis of Bit-Width Reduced Floating-Point Arithmetic Units in FPGAs: A Case Study of Neural Network-Based Face Detector. (2nd July 2009) Authors: Lee, Yongsoon; Choi, Younhee; Ko, Seok-Bum; Ho Lee, Moon Other Names: Leeser Miriam Academic Editor. Journal: EURASIP journal on embedded systems Issue: Volume 2009(2009) Page Start: Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
2. Performance Analysis of Bit-Width Reduced Floating-Point Arithmetic Units in FPGAs: A Case Study of Neural Network-Based Face Detector. (2nd July 2009) Authors: Lee, Yongsoon; Choi, Younhee; Ko, Seok-Bum; Ho Lee, Moon Other Names: Leeser Miriam Academic Editor. Journal: EURASIP journal on embedded systems Issue: Volume 2009(2009) Page Start: Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗
3. Double-Layer Low-Density Parity-Check Codes over Multiple-Input Multiple-Output Channels. (12th January 2012) Authors: Mao, Yun; Guo, Ying; Peng, Jun; Jiang, Xueqin; Ho Lee, Moon Other Names: Yeo Tat Academic Editor. Journal: International journal of antennas and propagation Issue: Volume 2012(2012) Page Start: Record Type: Journal Article View Content: Available online (eLD content is only available in our Reading Rooms) ↗