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You searched for: Author/Creator Han, Cheng‐YuLimit your search
- Han, Cheng‐Yu [remove] 1
- 621.39 1
- Computer architecture -- Periodicals 1
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- PSN‐aware circuit test timing prediction -- machine learning -- power supply noise -- PSN -- IR drop -- yield loss -- very large scale integration chip testing -- circuit timing simulation -- neural network -- support vector regression -- SVR -- least‐square boosting -- LSBoost -- raw data dimension reduction -- feature extractions -- input‐output transition -- flip‐flop transition in window -- FFTW -- terminal FF transition of long paths -- switching activity in window -- SAW -- PATH -- physical‐aware features -- timing‐aware feature -- leon3mp benchmark circuit -- IOT method -- circuit simulation tools 1
- learning (artificial intelligence) -- circuit simulation -- VLSI -- integrated circuit testing -- integrated circuit noise -- neural nets -- regression analysis -- support vector machines -- feature extraction -- least squares approximations -- data reduction 1