Processor in the Loop Verification of Fault Tolerant Control for a Three Phase Inverter in Grid Connected PV System. Issue 2 (1st June 2023)

• Record Type: Journal Article
• Authors: Ullah, Nasim; Sami, Irfan; Jamal Babqi, Abdulrahman; I Alkhammash, Hend; Belkhier, Youcef; Althobaiti, Ahmed; Ibeas, Asier
• Is Part Of: Energy sources. Volume 45:Issue 2(2023)
• Page Start: 3760
• Page End: 3776
• Publication Date: 2023-06-01
• Subjects: Three-phase grid-connected inverter -- robust fault tolerant control -- super twisting sliding mode control -- processor in the loop testing; Natural resources -- Periodicals; Energy consumption -- Periodicals; Energy consumption -- Climatic factors -- Periodicals; Energy conversion -- Periodicals; Energy conversion -- Environment aspects -- Periodicals; Power (Mechanics) -- Periodicals; 333.7905
• DOI: 10.1080/15567036.2021.2015486
• Languages: English
• ISSNs: 1556-7036

Abstract

ABSTRACT: The techno-economic feasibility of photovoltaic (PV) solar generation systems is greatly dependent on its operating conditions. However, significant penetration of PV sources into alternating current (AC) grids may cause lower system inertia, decreased system damping, and higher frequency fluctuations when grids are subjected to fault conditions. In this paper, a two-stage three-phase grid-connected PV-based inverter system is analyzed under grid fault conditions using a robust fault-tolerant super twisting sliding mode control scheme. Moreover, closed control system is formulated using Lyapunov theorem and its global stability is ensured. The proposed controller is tested in processor in the loop experimentation using a Texas Instrument (TI) Launchpad (TMS 320F28379D). The control performance and resilience of the proposed control system is tested under three-phase faults introduced between the inverter–grid interface buses. Under the above test conditions, a comparative analysis is performed for the proposed adaptive super twisting sliding mode control (ASTSMC) and fixed gain sliding mode control (SMC) control method. Under fault conditions, the inverter power has a settling time of 50 m-s with ASTMC control while with fixed gain STSMC, the settling time is longer and the observed settling time is 115 m-s. Moreover under faulty conditions, a voltage dip of 400 V is recorded with ASTSMC while with fixed gain STSMC controller the observed dip is 600 V. With the proposed ASTSMC controller, THD settles down to under 3% in 50 m-s while the fixed gain STSMC takes 115 m-s.