Design and optimization of a new CMOS high-speed H–H neuron. (June 2023)

• Record Type: Journal Article
• Authors: Guo, Chunbing; Xiao, Yicheng; Jian, Mingchao; Zhao, Jianlin; Sun, Bo
• Is Part Of: Microelectronics journal. Volume 136(2023)
• Publication Date: 2023-06
• Subjects: Hodgkin-Huxley neuron model -- CMOS -- Membrane capacitor -- Biomimetic neuromorphic circuit; Microelectronics -- Periodicals; Microélectronique -- Périodiques; Microelectronics; Electronic journals; Journals - contents and abstracts; Periodicals; 621.3805
• DOI: 10.1016/j.mejo.2023.105774
• Languages: English
• ISSNs: 0959-8324

Abstract

Abstract: Balance among inter-spike interval (ISI), power consumption and biological reality is one of the major concerns of the Hodgkin-Huxley neuron circuit design trade-off. This paper proposed a CMOS high-speed H–H neuron circuit design. The three current channels in the theoretical H–H model were achieved by 180-nm CMOS circuits. For accurate measurement, input and output modules are integrated with the proposed neuron circuit. For validation of circuit design, the proposed neuron circuit is fabricated by the 180-nm 1P6M CMOS process. The active area of the fabricated H–H neuron circuit is about 0.018 mm 2 . With 1.8 V input, power consumption of the proposed H–H neuron is around 111.3 μW. Test results have a good agreement with simulation results. For optimization of the proposed neuron circuit, relationship between the on-chip capacitance and the ISI was analyzed via a simulation based orthogonal Design of Experiment (DoE). It has found that the ISI of the proposed neuron circuit decreases exponentially with value of two on-chip capacitor. Among two critical capacitors, the repolarization capacitor has a greater influence on the ISI than the membrane capacitor.