Designing low‐diameter interconnection networks with multi‐ported host‐switch graphs. (3rd December 2020)

• Record Type: Journal Article
• Authors: Yasudo, Ryota; Nakano, Koji; Koibuchi, Michihiro; Matsutani, Hiroki; Amano, Hideharu
• Other Names: Bordin Jacir Luiz guestEditor.; Ito Yasuaki guestEditor.; Wakrime Abderrahim Ait guestEditor.; Sellami Mohamed guestEditor.; Halima Riadh Ben guestEditor.
• Is Part Of: Concurrency and computation. Volume 35:Number 11(2023)
• Page Start: n/a
• Page End: n/a
• Publication Date: 2020-12-03
• Subjects: bipartite graph -- block design -- graph theory -- interconnection network -- projective plane; Parallel processing (Electronic computers) -- Periodicals; Parallel computers -- Periodicals; 004.35
• DOI: 10.1002/cpe.6115
• Languages: English
• ISSNs: 1532-0626

Abstract

Summary: A host‐switch graph was originally proposed as a graph that represents a network topology of a computer systems with 1‐port host computers and Δ ‐port switches. It has been studied from both theoretical and practical aspects in terms of the diameter, the average shortest path length, and the performance of real applications. In recent high‐performance computing systems, however, a host computer is connected to multiple switches by using InfiniBand, NVSwitch, or Omni‐Path, and consequently they provide high bandwidths. Since a host‐switch graph cannot represent such systems, this article extends a host‐switch graph so that it can represent such systems. As a result, a host‐switch graph can include multi‐ported hosts. Furthermore, we propose to use multi‐port hosts for reducing the diameter. We show that the diameter minimization is equivalent to solving the degree diameter problem for bipartite graphs of diameter three. Our experimental results show that we can drastically reduce the diameter as well as increasing the bandwidth and improves performance of MPI applications by up to 162% as compared with networks with single‐ported hosts.