A two-way three-stage W-band power amplifier with series-parallel inductor-based T-type inter-stage matching network. (May 2023)

• Record Type: Journal Article
• Authors: Xie, Kenan; Wang, Keping; Zhang, Hao
• Is Part Of: Microelectronics journal. Volume 135(2023)
• Publication Date: 2023-05
• Subjects: CMOS SOI -- Cascode -- Inter-stage matching network -- Power combining; Microelectronics -- Periodicals; Microélectronique -- Périodiques; Microelectronics; Electronic journals; Journals - contents and abstracts; Periodicals; 621.3805
• DOI: 10.1016/j.mejo.2023.105770
• Languages: English
• ISSNs: 0959-8324

Abstract

Abstract: A two-way three-stage W-band power amplifier (PA) in 65 nm CMOS SOI process (Ft /Fmax : 120 GHz/220 GHz) is presented in this paper. A differential cascode structure with a series-parallel inductor-based T-type inter-stage matching network is proposed to improve efficiency and power gain near three quarters of Ft . A high passive efficiency transformer-based two-way parallel power combining output matching network is implemented to increase the output power and achieve compact layout. The proposed W-band PA achieves a post-layout simulated 22.1-dB small-signal power gain (S21 ) and 7.2-GHz 3-dB bandwidth from 90.9 to 98.1 GHz. The post-layout simulated large-signal performances of the PA shows it achieves 17.11 dBm saturated output power (Psat ), 13.68 dBm output 1-dB compression point (OP1dB ) and 11.15% peak power-added efficiency (PAE) at 94.5 GHz.