Cite
HARVARD Citation
Singhal, S. et al. (2023). Gated Clock and Revised Keeper (GCRK) Domino Logic Design in 16 nm CMOS Technology. IETE journal of research. 69 (3), pp. 1686-1693. [Online].
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Singhal, S. et al. (2023). Gated Clock and Revised Keeper (GCRK) Domino Logic Design in 16 nm CMOS Technology. IETE journal of research. 69 (3), pp. 1686-1693. [Online].