Experimental Verification of Single-Stage Power Factor Correction Converter with Improved Light-Load Efficiency. Issue 1 (December 2020)

• Record Type: Journal Article
• Authors: Thangisetty, Yashwanth; Balamurugan, P.; Senthil Kumar, N.
• Is Part Of: Journal of physics. Volume 1716:Issue 1(2021)
• Publication Date: 2020-12
• Subjects: Physics -- Congresses; 530.5
• DOI: 10.1088/1742-6596/1716/1/012002
• Languages: English
• ISSNs: 1742-6588

Abstract

Abstract: Single-stage single-switch ac/dc converters with power factor correction will have higher power losses under a light-load condition, as compared to that of two-stage approach, due to sharing of a common power transistor such that the power factor correction (PFC) stage cannot be switched OFF separately to save power losses. This paper addresses the problem by using a buck topology for the PFC stage of single-stage single-switch converters as it can completely turned OFF. This converter topology is capable of working in both buck mode and buck-boost mode depending on the rectified voltage at input side and power at load side. A simple and effective topology incorporating PFC for low power applications is simulated in Matlab/Simulink environment. Hardware implementation of the converter was and performance was verified with various practical light loads. It also satisfies the harmonic compliance of source current in accordance to the IEEE519:1992 recommendations. The control is very simple and gives good performance.