Progress with Defect Engineering in Silicon Heterojunction Solar Cells. Issue 9 (11th July 2021) - Wright, Matthew; Stefani, Bruno Vicari; Soeriyadi, Anastasia; Basnet, Rabin; Sun, Chang; Weigand, William; Yu, Zhengshan; Holman, Zachary; Macdonald, Daniel; Hallam, Brett
Abstract : Due to the low temperature processing constraint in silicon heterojunction (SHJ) solar cells, no defect engineering to improve silicon wafer quality is typically incorporated during cell fabrication. This means that high‐quality n‐type Cz wafers are required to produce high‐efficiency cells. Herein, recent demonstrations of incorporating defect engineering approaches, such as gettering and hydrogenation, into the SHJ process flow for both n‐type and p‐type wafers are surveyed. Defect engineering on wafers before cell fabrication can significantly improve the quality of low‐lifetime p‐type wafers, making them much more suitable for SHJ cells. Interestingly, these same approaches are also very effective in improving the cell performance in the n‐type wafers that are conventionally used in industry. Post‐cell illuminated annealing processes have been shown to eliminate boron–oxygen light‐induced degradation (LID) in p‐type wafers, leading to stable V OC exceeding 735 mV. New results indicate that the hydrogen naturally incorporated during SHJ processing is sufficient to passivate these defects. Similar illuminated annealing processes also lead to substantial improvements in n‐type SHJ cells. With these findings considered, it is demonstrated that a modified SHJ process flow, which includes defect engineering on a wafer level and post‐cell hydrogen passivation, is beneficial for SHJ production, regardless of the wafer type. Abstract : The benefits of including defect engineering processes, either via treatments on the silicon wafer level or post‐cell annealing processes, into the fabrication approach for silicon heterojunction solar cells are reviewed. Defect engineering can improve silicon heterojunction solar cells made using both cheap p‐type wafers and the more expensive n‐type CZ wafers currently used in industry.