How Thin Practical Silicon Heterojunction Solar Cells Could Be? Experimental Study under 1 Sun and under Indoor Illumination. Issue 1 (12th September 2021)

• Record Type: Journal Article
• Authors: Chime, Ugochi; Wolf, Leon; Buga, Viktoriia; Weigand, Daniel; Gad, Alaaeldin; Köhler, Julian; Lambertz, Andreas; Duan, Weiyuan; Ding, Kaining; Merdzhanova, Tsvetelina; Rau, Uwe; Astakhov, Oleksandr
• Is Part Of: Solar RRL. Volume 6:Issue 1(2022)
• Page Start: n/a
• Page End: n/a
• Publication Date: 2021-09-12
• Subjects: effective carrier lifetimes -- indoor performances -- silicon heterojunction solar cells -- silicon surface passivation -- silicon wafer thicknesses; Solar energy -- Periodicals; Photovoltaic power generation -- Periodicals; Solar energy -- Research -- Periodicals; Photovoltaic power generation -- Research -- Periodicals; Periodicals; 333.7923
• DOI: 10.1002/solr.202100594
• Languages: English
• ISSNs: 2367-198X

Abstract

Abstract : The transition toward thinner microcrystalline silicon wafers for their potential performance gain has been of interest in recent years. Theoretical predictions have estimated a maximum efficiency for silicon wafers to be at about 100−110 μm thickness. The potential and losses in silicon heterojunction solar cells prepared on wafers with thickness in the range of 60−170 μm with focus on open‐circuit voltage ( V OC ) and fill factor (FF) are studied experimentally. The applicability of thinner wafers for low light and indoor applications using light emitting diode (LED) lighting is also studied. The implied V OC ( iV OC ) is observed to increase with a decrease in wafer thickness according to theoretical predictions with absolute values approaching the theoretical limit. Unlike the iV OC, the implied FF is observed to decrease with wafer thickness reduction opposite to the theoretical predictions which are related to the effect of surface recombination. A combination of gains and losses results in a broad range of high efficiency under 1 sun for wafer thicknesses ranging from 75 to 170 μm with maximum of 22.3% obtained at 75 μm. As for indoor performance, thinner wafers show slightly better efficiency at lower light intensity under sun and LED illumination, promising improved performance for even thinner devices. Abstract : The effect of wafer thickness on the performance of silicon heterojunction solar cells is studied. It is found that while the decrease in wafer thickness results in higher open‐circuit voltage, the fill factor reduces as a result of increased surface recombination. A broad range of high efficiency is obtained between 75 and 170 μm wafer thickness.