Amorphous TiO2 Passivating Contacts for Cu(In, Ga)(S, Se)2 Ultrathin Solar Cells: Defect‐State‐Mediated Hole Conduction. Issue 8 (4th January 2023) - Park, Gi Soon
Abstract: Ultrathin solar cells (UTSCs) have attracted much research attention because of their superior potential for low‐cost production and diverse applications. For UTSCs to achieve high efficiency, rear‐interface passivation is critical because it has greater influence on thinner absorbers. Conventional passivation layers (e.g., Al2 O3 and SiO2 ) inevitably require patterned contact openings for electrical conduction, the complex processing of which severely impedes the scale‐up production of UTSCs. Herein, this study reports that amorphous TiO2 layers can act as a passivating contact, which not only passivates defective rear‐interfaces but also provides excellent electrical conduction, for solution‐processed Cu(In, Ga)(S, Se)2 UTSCs. The amorphous nature of TiO2 layers is found to play a key role in achieving desirable ohmic conduction over the entire area without any contact openings. Holes in absorbers easily move into amorphous TiO2 layers, even in the presence of large valence band offset (2.6 eV), proving that the defect states within these TiO2 layers act as hole conduction pathways. While control devices experience huge open‐circuit voltage ( V OC ) losses (−303 mV) after reduction of absorber thickness from 750 to 300 nm, devices with amorphous TiO2 layers exhibit V OC gains (+8 mV), encouraging the realization of high‐efficiency UTSCs with a simple, easily scalable, and highly reproducible process. Abstract : A passivating contact for thin‐film solar cells is developed. Amorphous TiO2 layers provide excellent passivation ability, desirable ohmic conduction, and thermal phase stability, drastically improving the efficiency of Cu(In, Ga)(S, Se)2 ultrathin solar cells with a simple and easily scalable deposition process. Many defect states created by amorphousness effectively transport carriers, showing their great potential application for various semiconductor–metal interfaces.