Subpicosecond resolution time interval counter with multisampling wave union type B TDCs in 28 nm FPGA device. (15th March 2023)

• Record Type: Journal Article
• Authors: Kwiatkowski, Paweł; Sondej, Dominik; Szplet, Ryszard
• Is Part Of: Measurement. Volume 209(2023)
• Publication Date: 2023-03-15
• Subjects: Field-programmable gate array (FPGA) -- Time-to-digital converter (TDC) -- Time interval counter -- Time measurement -- Wave union TDC; Weights and measures -- Periodicals; Measurement -- Periodicals; Measurement; Weights and measures; Periodicals; 530.8
• DOI: 10.1016/j.measurement.2023.112510
• Languages: English
• ISSNs: 0263-2241

Abstract

Graphical abstract: Highlights: A time interval counter is described with state-of-the-art performance. A new wave union TDC architecture enables subpicosecond resolution. A 2.6 ps precision (1.84 ps single-shot) is achieved using off-the-shelf FPGA device. Abstract: We present the design, operation, and test results of a novel integrated time interval counter that provides exceptionally high resolution (0.4 ps) and precision (2.6 ps rms in the best case scenario). The operation principle of the counter is based on the multisampling wave union (WU) method, involving both types of WU launchers, A and B, and implemented in Xilinx Kintex-7 FPGA device. The crucial for obtaining high performance of the counter was both the careful manual placing and routing of key components, and the efficient pre-encoder design, which substantially limited the bubble errors. Two approaches to implement the pre-encoder in the FPGA chip, i.e. logic resources saving or throughput enhancing (up to 385 MSa/s), were examined. Thermal tests, performed in the range of 40 °C, made it possible to verify the temperature dependence of all main parameters of the counter, such as precision, resolution and offset.