High-performance and highly-stable soft error resistant 12T SRAM cell for space applications. (February 2023) - Liu, Zhongyang
Abstract: In this paper, a high-performance and highly-stable soft error resistant 12T (HPHS12T) SRAM cell is proposed. Based on polarity reversal design and NMOS stacked structure, the proposed HPHS12T cell can recover from any single event upsets (SEU) induced at all its sensitive nodes and even single event multiple-node-upsets (SEMNU) induced at its internal storage node pair Q-QN, while also having the maximum read static noise margin (RSNM) and write noise margin (WNM), as well as excellent write-ability. Though the HPHS12T cell exhibits a larger static hold power, it has the best overall performance of all the other cells. This is proven by having the highest electrical quality metric (EQM) value, thus making the proposed cell a better choice for space applications. Highlights: Since only 2 PMOS transistors are used, the proposed cell mitigates parasitic bipolar effect and provides better soft error tolerance. Because of its polarity reversal design, the HPHS12T can recover from any SEU induced at any of its sensitive nodes. as well as SEMNU induced at its internal node pair. Compared to all other considered cells, the HPHS12T cell shows the shortest write delay and largest read static noise margin (RSNM), write noise margin (WNM), and wordline write trip voltage (WWTV).