Analysis of Stuck Reset Failure in Phase‐Change Memory by Calculating Phase‐Change Stress using Finite Element Simulation. Issue 3 (18th January 2021)

• Record Type: Journal Article
• Authors: Lee, Hwanwook; Kwon, Yongwoo
• Other Names: Noé Pierre guestEditor.; Kooi Bart J. guestEditor.; Wuttig Matthias guestEditor.
• Is Part Of: Physica status solidi. Volume 15:Issue 3(2021)
• Page Start: n/a
• Page End: n/a
• Publication Date: 2021-01-18
• Subjects: endurance -- finite element simulations -- phase-change memory -- phase-change stress -- stuck reset; Solid state physics -- Periodicals; 530.4105
• DOI: 10.1002/pssr.202000419
• Languages: English
• ISSNs: 1862-6254

Abstract

Abstract : Stuck reset is an open‐circuit failure that occurs in phase‐change memory (PCM) after repeated reset and set operations, that is, endurance cycling. Stuck reset is majorly caused by phase‐change stress, which is the mechanical stress induced during a reset operation due to the density difference between the amorphous and crystalline phases of the phase‐change material. This indicates that a reduction in phase‐change stress may improve the endurance characteristics of PCM. Herein, a simulation technique for the calculation of phase‐change stress using a finite‐element software is proposed. Subsequently, a comparative study of the endurance of different PCM device architectures is performed. The results reveal that the self‐heating architecture exhibits superior endurance compared to the heater‐based architecture. Furthermore, the void locations in the experiments coincide with the most highly stressed locations in the simulation. Abstract : A simulation technique is developed to calculate the mechanical stress caused by phase change to investigate the stuck reset failure in phase‐change memory. The simulation properly explains the experimental results, such as the superior endurance of the self‐heating cell architecture to that of the heater‐based architecture and the locations most susceptible to void formation in the devices.