Pixel detector hybridisation with anisotropic conductive films. (1st January 2023)

• Record Type: Journal Article
• Authors: Schmidt, J.V.; Braach, J.; Dannheim, D.; De Oliveira, R.; Svihra, P.; Vicente Barreto Pinto, M.
• Is Part Of: Journal of instrumentation. Volume 18:Number 1(2023)
• Publication Date: 2023-01-01
• Subjects: Hybrid detectors -- Manufacturing -- Materials for solid-state detectors -- Detector design and construction technologies and materials; Scientific apparatus and instruments -- Periodicals; 502.84
• DOI: 10.1088/1748-0221/18/01/C01040
• Languages: English
• ISSNs: 1748-0221

Abstract

Abstract: Hybrid pixel detectors require a reliable and cost-effective interconnect technology adapted to the pitch and die sizes of the respective applications. During the ASIC and sensor R&D phase, and in general for small-scale applications, such interconnect technologies need to be suitable for the assembly of single-dies, typically available from Multi-Project-Wafer submissions. Within the CERN EP R&D programme and the AIDAinnova collaboration, innovative hybridisation concepts targeting vertex-detector applications at future colliders are under development. This contribution presents recent results of a newly developed in-house single-die interconnection process based on Anisotropic Conductive Film (ACF). The ACF interconnect technology replaces the solder bumps with conductive particles embedded in an adhesive film. The electro-mechanical connection between the sensor and the read-out chip is achieved via thermo-compression of the ACF using a flip-chip device bonder. A specific pad topology is required to enable the connection via conductive particles and create cavities into which excess epoxy can flow. This pixel-pad topology is achieved with an in-house Electroless Nickel Immersion Gold (ENIG) plating process that is also under development within the project. The ENIG and ACF processes are qualified with the Timepix3 ASIC and sensors, with 55 µm pixel pitch and 14 µm pad diameter. The ACF technology can also be used for ASIC-PCB/FPC integration, replacing wire bonding or large-pitch solder bumping techniques. This contribution introduces the ENIG plating and ACF processes and presents recent results on Timepix3 hybrid assemblies.