A novel dual trench gate power device by effective drift region structure. (January 2019) - Zareiee, Meysam
Abstract: In this paper, a new double trench-gate LDMOS transistor is presented obtaining desirable trade-off between breakdown voltage and specific on-resistance. Three silicon layers with two silicon dioxide layers are inserted in the drift region under the P-well. The silicon layers with high doping densities help to have low specific on-resistance. Moreover, the silicon dioxide layers modify the electric field and increase the breakdown voltage. The simulation of the proposed Double oxide and N type silicon windows in drift region of the double gate trench MOSFET (DONW-DG) with two dimensional ATLAS simulator shows that the electrical characteristics of the new structure are better than conventional trench gate LDMOS (TG) and conventional dual trench gate LDMOS (DG). Also, the design consideration is done to have optimum values of the lengths and thicknesses of the layers. In the optimum values, the breakdown voltage of about 209 V and the specific on-resistance of 0.51 mΩ cm 2 cause acceptable figure of merit. Highlights: A new drift region structure in dual trench gate power device is proposed. The structure is compared to two conventional structures. Three high doped silicon layers and two silicon oxide layers are inserted in drift region. The simulation is performed using two dimensional ATLAS simulator. Specific on resistance decreases and breakdown voltage increases.