(Invited) Novel Selector and 3D RRAM Development for High Density Non-Volatile Memory. (8th September 2015)

• Record Type: Journal Article
• Authors: Yang, Hongxin; Tan, Chun Chia; He, Wei; Li, Minghua; Jiang, Yu; Yang, Yi
• Is Part Of: ECS transactions. Volume 69:Number 5(2015)
• Page Start: 165
• Page End: 168
• Publication Date: 2015-09-08
• Subjects: Electrochemistry -- Periodicals; Electrochemistry; Periodicals; Electronic journals; Electronic journal; 541.37
• DOI: 10.1149/06905.0165ecst
• Languages: English
• ISSNs: 1938-5862

Abstract

Abstract : The development of a higher density non-volatile memory with the 3D vertical resistive random access memory (VRRAM) has attracted great interest from the memory industry. However, VRRAM currently faces the challenges in selecting the specific cell due to a large number of leakage paths, and fabrication process difficulties. In order to eliminate the sneak path and reduce the power consumption, we have developed a novel selector, which shows nearly ideal selector performances with >10 7 on/off ratio, 0.2 V holding voltage, 10 pA off-state leakage current, sharp on-switch slope of 7 mV/dec, <10 ns turn on speed, >10 9 endurance, >1.6 MA/cm 2 on current density. To investigate the VRRAM performance, we have developed a process flow to fabricate VRRAM and demonstrated a single level sidewall TaOx based VRRAM device. Beside the novel selector and VRRAM integration investigation, we have also proposed a transistor-based novel VRRAM (TB-RRAM) architecture.