Performance Analysis of FDSOI based Gate Diffusion Input Logic Gates at 28nm Technology Node. Issue 1 (January 2021)

• Record Type: Journal Article
• Authors: Singh, Rana Udayveer; Madhu, Charu; Joshi, Garima; Godara, Mehak
• Is Part Of: IOP conference series. Volume 1033:Issue 1(2021)
• Publication Date: 2021-01
• Subjects: Materials science -- Periodicals; 620.1105
• DOI: 10.1088/1757-899X/1033/1/012020
• Languages: English
• ISSNs: 1757-8981

Abstract

Abstract: In this paper, Fully Depleted Silicon on Insulator (FDSOI) MOSFET at 28nm channel length are simulated in COGENDA Visual TCAD tool. Buried Oxide layer (BOX) between channel and substrate in FDSOI improves the electric field inside the device. The device characteristics are compared in terms of threshold voltage, transconductance parameter, Ion /Ioff ratio and Short Channel Effects (SCEs). To implement VLSI circuits, Complementary Metal Oxide Semiconductor (CMOS) logic is a common choice. However, in the case of CMOS, the logic implementation requires a transistor count equal to twice the number of logic inputs. Therefore, the area is always an issue in the case of the CMOS logic family. To address this issue, Gate Diffusion Input (GDI) based logic has been investigated because it uses less number of transistors. Hence FDSOI MOSFET based GDI logic gates are proposed in this article. FDSOI MOSFET exhibits improved electrical characteristics which can reduce the power consumption considerably and help in expanding the battery life of devices while the GDI logic helps in designing the compact circuit for portable equipment.