A Monolithic Stochastic Computing Architecture for Energy Efficient Arithmetic. Issue 2 (8th December 2022)

• Record Type: Journal Article
• Authors: Ravichandran, Harikrishnan; Zheng, Yikai; Schranghamer, Thomas F; Trainor, Nicholas; Redwing, Joan M.; Das, Saptarshi
• Is Part Of: Advanced materials. Volume 35:Issue 2(2023)
• Page Start: n/a
• Page End: n/a
• Publication Date: 2022-12-08
• Subjects: 2D materials -- arithmetic -- memtransistors -- stochastic computing; Materials -- Periodicals; Chemical vapor deposition -- Periodicals; 620.11
• DOI: 10.1002/adma.202206168
• Languages: English
• ISSNs: 0935-9648

Abstract

Abstract: As the energy and hardware investments necessary for conventional high‐precision digital computing continue to explode in the era of artificial intelligence (AI), a change in paradigm that can trade precision for energy and resource efficiency is being sought for many computing applications. Stochastic computing (SC) is an attractive alternative since, unlike digital computers, which require many logic gates and a high transistor volume to perform basic arithmetic operations such as addition, subtraction, multiplication, sorting, etc., SC can implement the same using simple logic gates. While it is possible to accelerate SC using traditional silicon complementary metal–oxide–semiconductor (CMOS) technology, the need for extensive hardware investment to generate stochastic bits (s‐bits), the fundamental computing primitive for SC, makes it less attractive. Memristor and spin‐based devices offer natural randomness but depend on hybrid designs involving CMOS peripherals for accelerating SC, which increases area and energy burden. Here, the limitations of existing and emerging technologies are overcome, and a standalone SC architecture embedded in memory and based on 2D memtransistors is experimentally demonstrated. The monolithic and non‐von‐Neumann SC architecture occupies a small hardware footprint and consumes a miniscule amount of energy (<1 nJ) for both s‐bit generation and arithmetic operations, highlighting the benefits of SC. Abstract : A stochastic computing architecture for arithmetic operations, such as addition, subtraction, multiplication, and sorting, with low energy and area overhead through monolithic integration of logic gates and stochastic‐bit generator is reported, which exploits the cycle‐to‐cycle variation in programming of 2D memtransistors based on monolayer MoS2 .