Word Length Selection Method for Controller Implementation on FPGAs Using the VHDL-2008 Fixed-Point and Floating-Point Packages. (11th August 2010)

• Record Type: Journal Article
• Authors: Urriza Urriza, I. I.; Barragán Barragán, L. A. L. A.; Navarro Navarro, D. D.; Artigas Artigas, J. I. J. I.; Lucia Lucia, O. O.
• Other Names: Leeser Leeser Miriam Miriam Academic Editor.
• Is Part Of: EURASIP journal on embedded systems. Volume 2010(2010)
• Publication Date: 2010-08-11
• Subjects: Embedded computer systems -- Periodicals; Systèmes enfouis (Informatique); Embedded computer systems; Periodicals; Electronic journals; 006.22
• DOI: 10.1155/2010/593264
• Languages: English
• ISSNs: 1687-3955

Abstract

Abstract : This paper presents a word length selection method for the implementation of digital controllers in both fixed-point and floating-point hardware on FPGAs. This method uses the new types defined in the VHDL-2008 fixed-point and floating-point packages. These packages allow customizing the word length of fixed and floating point representations and shorten the design cycle simplifying the design of arithmetic operations. The method performs bit-true simulations in order to determine the word length to represent the constant coefficients and the internal signals of the digital controller while maintaining the control system specifications. A mixed-signal simulation tool is used to simulate the closed loop system as a whole in order to analyze the impact of the quantization effects and loop delays on the control system performance. The method is applied to implement a digital controller for a switching power converter. The digital circuit is implemented on an FPGA, and the simulations are experimentally verified.