Design of energy efficient approximate subtractors and restoring dividers for error tolerant applications. (January 2023)

• Record Type: Journal Article
• Authors: Krishnan, Komathy Vanitha; Satish, Anila; Krishnan, Pradeev raj
• Is Part Of: Microelectronics journal. Volume 131(2023)
• Publication Date: 2023-01
• Subjects: Approximate computing -- Approximate dividers -- Power -- Area -- Delay -- Image processing; Microelectronics -- Periodicals; Microélectronique -- Périodiques; Microelectronics; Electronic journals; Journals - contents and abstracts; Periodicals; 621.3805
• DOI: 10.1016/j.mejo.2022.105668
• Languages: English
• ISSNs: 0959-8324

Abstract

Abstract: Approximate computing has emerged as a promising design technique exclusively for error-resilient applications such as multimedia, digital signal processing, and embedded systems. Approximate computing is appropriate for arithmetic circuits like subtractors and dividers. This present study proposes simplified approximate subtractors based on logic level reduction. High-speed approximate ripple borrow subtractors are designed to accomplish energy and area efficiency. Novel approximate restoring dividers by means of the triangle replacement technique and horizontal replacement techniques are projected. Detailed hardware and accuracy analysis are performed at 45 nm technology node using Cadence Genus Synthesis Solution. The proposed designs offer improved performance in terms of power, delay, and area than the existing design techniques. Error metric evaluation of the proposed designs shows better MED, NMED, and MSE values. Variation detection in image processing is proven for the efficiency of the proposed designs and has a minimal impact on the output quality. Highlights: Simplified Approximate Subtractors (SAPSCs) are proposed based on logic complexity reduction by Karnaugh map simplification. High-speed Approximate Ripple Borrow Subtractors (ARBSs) are designed incorporating SAPSCs to accomplish energy and area efficiency. Approximate Restoring Dividers by means of the Triangle Replacement technique (ARDXTRs) and Horizontal Replacement techniques (ARDXHRs) are proposed. Detailed hardware and accuracy analysis are performed at 45 nm technology node using Cadence Genus Synthesis Solution. The proposed designs significantly achieve a reduction in power, area, and delay and superior error metrics.Variation detection in image processing is proven for its efficiency.