Edge-TCT evaluation of high voltage-CMOS test structures with unprecedented breakdown voltage for high radiation tolerance. (1st December 2022) - Wade, B.; Franks, M.; Hammerich, J.; Karim, N.; Powell, S.; Vilella, E.; Zhang, C.
Abstract: This paper presents the edge Transient Current Technique (eTCT) measurements of passive test-structures on the UKRI-MPW0 pixel chip, a 280 µm thick proof-of-concept High Voltage-CMOS (HV-CMOS) device designed and fabricated in the LFoundry 150 nm technology node with a nominal substrate resistivity of 1.9 kΩ cm. Samples were irradiated up to 1 × 10 16 1 MeV neq  cm −2 with neutrons to observe the change in depletion depth and effective doping concentration with irradiation. A depletion depth of the sensor was found to be ≈50 µm at ≈−400 V at 1 × 10 16 1 MeV neq  cm −2 . A stable damage introduction rate ( g c ) was also calculated to be 0.011 ± 0.002 cm −1 .