A new CMOS compatible high performance first-order all-pass filter realisation. Issue 4 (2nd October 2022)

• Record Type: Journal Article
• Authors: Chaturvedi, Bhartendu; Mohan, Jitendra; Gupta, Shiv Narain
• Is Part Of: Australian journal of electrical & electronics engineering. Volume 19:Issue 4(2022)
• Page Start: 349
• Page End: 362
• Publication Date: 2022-10-02
• Subjects: Analog filter -- voltage-mode -- all-pass -- DV-EXCCCII; Electrical engineering -- Periodicals; Electronics -- Periodicals; Periodicals; 621.305
• DOI: 10.1080/1448837X.2022.2068487
• Languages: English
• ISSNs: 1448-837X

Abstract

ABSTRACT: A new realisation of an electronically tunable first-order voltage-mode all-pass filter enjoying the feature of low voltage and low power is proposed in this paper. The proposed realisation of filter employs only one active element namely differential voltage extra-x current controlled conveyor and one grounded capacitor. The use of minimal number of components makes the proposed structure simple and attractive from chip fabrication point of view. The performance of proposed structure is also discussed by considering the effects of parasitic and non-idealities of the used active element. Additionally, higher order filter realisation is also included to enrich the presented work by exploring possible applicability aspects. The theoretical performance is validated at schematic level using 0.18 µm CMOS technology parameters with ±1 V supply voltages. Furthermore, Cadence Analog Design Environment (ADE) with gpdk 0.18 µm technology is used to design the layout of the proposed circuit. Pre-layout and post-layout simulation verification is provided to extend the real time validation of theoretical aspects.