Controlled Optoelectronic Response in van der Waals Heterostructures for In‐Sensor Computing. (26th August 2022)

• Record Type: Journal Article
• Authors: Yang, Qiyu; Luo, Zheng‐Dong; Zhang, Dawei; Zhang, Mingwen; Gan, Xuetao; Seidel, Jan; Liu, Yan; Hao, Yue; Han, Genquan
• Is Part Of: Advanced functional materials. Volume 32:Number 45(2022)
• Page Start: n/a
• Page End: n/a
• Publication Date: 2022-08-26
• Subjects: 2D materials -- neuromorphic devices -- optoelectronic memory -- sensors -- vdW heterostructures; Materials -- Periodicals; Chemical vapor deposition -- Periodicals; 620.11
• DOI: 10.1002/adfm.202207290
• Languages: English
• ISSNs: 1616-301X

Abstract

Abstract: In‐sensor computing with visual information, which can integrate photo‐sensing, data storage, and computation functions within the same physical element, has promised a fundamentally different architecture for future machine vision technology with extreme energy and time efficiency. The elementary devices required to fulfil the goal of such a new sensory computation scheme would demand a bold functional variation to the existing sensor and data processing hardware. Here, a van der Waals (vdW) heterostructure‐based optoelectronic transistor that can act as an integrated photoreceptor, memory, and computation unit by exploiting its own physical attributes is demonstrated. It is found that diverse photoelectric control of device conductance can lead to versatile photoresponse characteristics, including memristive behaviors, retention‐, polarity‐ and strength‐tunable photoconductance, photoelectric‐coupling effect, etc. Exploiting the photoelectric‐coupling effect, reconfigurable and nonvolatile optoelectronic logic functions are realized in this device, featuring a logic‐in‐sensor unit. With the same device, both short‐ and long‐term synaptic plasticity can be faithfully emulated, rendering it an optoelectronic synaptic transistor. Moreover, a psychologic human memory model is implemented with the device, showing the emulation of memorization and learning processes. This prototypical demonstration provides a promising hardware system for visual information in‐sensor computing capable of addressing complex computation tasks. Abstract : A hardware‐reconfigurable visual information in‐sensor computing architecture integrating both synaptic and digital logic functions is proposed based on the photoelectric‐coupling engineered vdW heterostructures. Leveraging on the diversified optoelectronic behaviors in vdW heterostructure‐based floating gate transistors, rich nonvolatile photoelectrical logic functionalities and synaptic operations are demonstrated. These findings highlight the prospects of 2D semiconductor‐based optoelectronics for both digital and analog visual in‐sensor computing.