1T-NOR Flash memory after endurance degradation: An advanced TCAD simulation. (November 2022) - Matteo, F.; Simola, R.; Postel-Pellerin, J.; Coulié, K.
Abstract: In this paper we have performed TCAD simulations of 1T-NOR Flash electrical characteristics after 1 million cycles of program/erase (P/E) operations. Thanks to the TCAD simulation, spatial defect distributions have been proposed to explain the endurance degradation. Process simulation was based on a 90 nm node embedded non-volatile memory technology (eNVM) produced at STMicroelectronics. Hot carrier injection (HCI) and advanced tunneling models were used during program and erase, whereas Flash degradation was considered through defects located at Si/SiO2 interface and inside SiO2 . Obtained results for programming window before and after cycling, as well as consumption current, are in excellent agreement with experiments. Moreover, within this framework it was possible to correctly reproduce the I-V characteristics at the unstressed Flash side after 1 million cycles as previously reported in the literature. Highlights: We have performed TCAD simulations of 1T-NOR Flash electrical characteristics after 1 million cycles. Spatial defect distributions have been proposed. Programming window, kinetic and current consumption simulations are in excellent agreement with experiments.