Design of a 24×28 gbaud tunable channel attenuator IC for PCB backplane transmission. (October 2022)

• Record Type: Journal Article
• Authors: Wang, Hui; Chen, Yingmei; Wang, Baiping; Chen, Lufeng; Guo, Chao; Hu, Wenxuan; Zhu, En; Xu, Jian
• Is Part Of: Microelectronics journal. Volume 128(2022)
• Publication Date: 2022-10
• Subjects: SerDes channel -- Signal integrity -- Transmission line modeling -- Tunable channel attenuator -- FC-BGA; Microelectronics -- Periodicals; Microélectronique -- Périodiques; Microelectronics; Electronic journals; Journals - contents and abstracts; Periodicals; 621.3805
• DOI: 10.1016/j.mejo.2022.105543
• Languages: English
• ISSNs: 0959-8324

Abstract

Abstract: This paper proposes a tunable 24-channel attenuator integrated circuit (IC) that can simulate the attenuation characteristics of different-length printed circuit board (PCB) backplane channels in the 0–25 GHz frequency range. The attenuation value of −3 dB ∼ -20 dB@14 GHz can be tuned by the IIC interface by steps of 0.5 dB. The fitting error between each attenuation curve and the PCB corresponding backplane attenuation curve is less than ±5%. The input and output characteristic impedance of this attenuator is 50 Ω. This 24-channel attenuator was packaged in a flip-chip ball grid array (FC-BGA) with interchannel crosstalk less than −45 dB. This 24 × 28 Gbaud tunable channel attenuator IC can replace the PCB backplane channel to transmit a non-return-to-zero (NRZ) signal or a 4-level pulse amplitude modulation (PAM4) signal for serializer/deserializer (SerDes) testing. To the best of our knowledge, no similar approach to modeling transmission lines with ICs was found.