Word length selection method for HIL power converter models. (July 2021) - Martínez-García, María Sofía; de Castro, Angel; Sanchez, Alberto; Garrido, Javier
Highlights: A simple and analytical method of Hardware in the Loop models of converters. Rules to calculate the optimize word length signals are given. The word length is selected depending on the group the signals which belong to. Errors are grouped by branches with signals with respect to the additional fractional bits. Errors grouped by the type of signals with signal respect to word length. Fewer hardware resources to reach the same level of error than 32-bit fixed-point. Considerably less area than 32-bit floating-point. Abstract: Hardware in the Loop (HIL) allows one to emulate a system or part of it in real time, and it is, therefore, widely used for power electronics. Real-time simulations require high speed so FPGAs (Field Programmable Gate Array) in HIL are widely used. It is crucial to minimize the delay and area, without losing either resolution or accuracy. Therefore, the Word Length (WL) of signals in power converter models has a huge influence. There are complex WL determination procedures that require long-time simulations. This paper presents a simple and analytical WL selection method for the signals of HIL models of converters. Signal groups are distinguished, and the WL signal is selected depending on the group the signals belong to. The method is applied to a boost and a buck converter in fixed-point. Finally, several rules are given to calculate the optimized WL in the signals of a power converter.