Performance Analysis of InAs-GaAs Gate-all-around Tunnel Field Effect Transistors (GAA-TFET) for Analog/ RF applications. Issue 1 (1st September 2022)

• Record Type: Journal Article
• Authors: Saravanan, M; Parthasarathy, Eswaran; Ramkumar, K
• Is Part Of: Journal of physics. Volume 2335:Issue 1(2022)
• Publication Date: 2022-09-01
• Subjects: Physics -- Congresses; 530.5
• DOI: 10.1088/1742-6596/2335/1/012043
• Languages: English
• ISSNs: 1742-6588

Abstract

Abstract: The purpose of this study to explore the performance of InAs-GaAs Gate-all-around (GAA) tunnelling field effect transistors (TFETs) in analogue and RF applications. The TCAD tool was used to assess the device's overall performance. In order to achieve the InAs-GaAs channel design, the suggested TFET features a gate oxide made of SiO2 near the drain and HfO2 near the source region. As a result of the hetero dielectric gate oxide being used, the tunnelling width at junction between drain and channel (JDC ) and junction between source and channel (JSC ) is reduced, and the ON-current at the drain-channel junction is increased (ION ). Device simulations have revealed that the SiO2-HfO2 gate dielectric has a low off-current (IOFF ) of 2.27 x 10 −17 A/m, a high enhanced ION of 7.39 x 10 −6 A/m. At the time of operation, the sub-threshold swing (SS) was 16.8 mV/dec. Because of its low power consumption, the device could potentially be a better choice for power management circuits used in energy harvesting applications, according to the findings.