Defect engineering in SiC technology for high-voltage power devices. (26th November 2020)

• Record Type: Journal Article
• Authors: Kimoto, Tsunenobu; Watanabe, Heiji
• Is Part Of: Applied physics express. Volume 13:Number 12(2020)
• Publication Date: 2020-11-26
• Subjects: silicon carbide (SiC) -- power device -- MOSFET -- stacking fault -- defect -- channel mobility; Physics -- Periodicals; Technology -- Periodicals; 621.05
• DOI: 10.35848/1882-0786/abc787
• Languages: English
• ISSNs: 1882-0778

Abstract

Abstract: Major features of silicon carbide (SiC) power devices include high blocking voltage, low on-state loss, and fast switching, compared with those of the Si counterparts. Through recent progress in the material and device technologies of SiC, production of 600–3300 V class SiC unipolar devices such as power metal-oxide-semiconductor field-effect transistors (MOSFETs) and Schottky barrier diodes has started, and the adoption of SiC devices has been demonstrated to greatly reduce power loss in real systems. However, the interface defects and bulk defects in SiC power MOSFETs severely limit the device performance and reliability. In this review, the advantages and present status of SiC devices are introduced and then defect engineering in SiC power devices is presented. In particular, two critical issues, namely defects near the oxide/SiC interface and the expansion of single Shockley-type stacking faults, are discussed. The current physical understanding as well as attempts to reduce these defects and to minimize defect-associated problems are reviewed.