Barrier Evaluation by Linearly Increasing Voltage Technique Applied to Si Solar Cells and Irradiated Pin Diodes. (30th January 2012)

• Record Type: Journal Article
• Authors: Gaubas, E.; Čeponis, T.; Kalendra, V.; Kusakovskij, J.; Uleckas, A.
• Other Names: Neto A. O. Academic Editor.; Saxén H. Academic Editor.
• Is Part Of: ISRN materials science. Volume 2012(2012)
• Publication Date: 2012-01-30
• Subjects: Materials science -- Periodicals; Materials science; Periodicals; 620.11
• DOI: 10.5402/2012/543790
• Languages: English
• ISSNs: 2090-6080

Abstract

Abstract : Technique for barrier evaluation by measurements of current transients induced by linearly increasing voltage pulse based on analysis of barrier and diffusion capacitance changes is presented. The components of the barrier capacitance charging and generation/recombination currents are discussed. Different situations of the impact of deep center defects on barrier and diffusion capacitance changes are analyzed. Basics of the profiling of layered junction structures using the presented technique are discussed. Instrumentation for implementation of this technique and for investigations of the steady-state bias infra-red illumination and temperature dependent variations of the barrier capacitance charging and generation/recombination currents are described. Applications of this technique for the analysis of barrier quality in solar cells and particle detectors fabricated on silicon material are demonstrated.