Heterogeneous Integration of Atomically Thin Semiconductors for Non‐von Neumann CMOS. Issue 33 (17th July 2022) - Pendurthi, Rahul; Jayachandran, Darsith; Kozhakhmetov, Azimkhan; Trainor, Nicholas; Robinson, Joshua A.; Redwing, Joan M.; Das, Saptarshi
Abstract: Atomically thin, 2D, and semiconducting transition metal dichalcogenides (TMDs) are seen as potential candidates for complementary metal oxide semiconductor (CMOS) technology in future nodes. While high‐performance field effect transistors (FETs), logic gates, and integrated circuits (ICs) made from n‐type TMDs such as MoS2 and WS2 grown at wafer scale have been demonstrated, realizing CMOS electronics necessitates integration of large area p‐type semiconductors. Furthermore, the physical separation of memory and logic is a bottleneck of the existing CMOS technology and must be overcome to reduce the energy burden for computation. In this article, the existing limitations are overcome and for the first time, a heterogeneous integration of large area grown n‐type MoS2 and p‐type vanadium doped WSe2 FETs with non‐volatile and analog memory storage capabilities to achieve a non–von Neumann 2D CMOS platform is introduced. This manufacturing process flow allows for precise positioning of n‐type and p‐type FETs, which is critical for any IC development. Inverters and a simplified 2‐input‐1‐output multiplexers and neuromorphic computing primitives such as Gaussian, sigmoid, and tanh activation functions using this non–von Neumann 2D CMOS platform are also demonstrated. This demonstration shows the feasibility of heterogeneous integration of wafer scale 2D materials. Abstract : In this work, large area synthesized n‐type MoS2 and p‐type vanadium doped WSe2 ‐based field effect transistors are integrated, with non‐volatile and analog storage capabilities to demonstrate digital logic and neuromorphic computing primitives highlighting the applicability of the fabrication process flow to realize 2D heterogeneous integrated circuits.