Soft‐punch‐through buffer concept for 600–1200 V IGBTs. Issue 15 (3rd October 2019)

• Record Type: Journal Article
• Authors: Andenna, Maxi; Buitrago, Elizabeth; Corvasce, Chiara; Papadopoulos, Charalampos; Jabrany, Rachid; Rahimo, Munaf
• Is Part Of: IET power electronics. Volume 12:Issue 15(2019)
• Page Start: 3874
• Page End: 3881
• Publication Date: 2019-10-03
• Subjects: semiconductor epitaxial layers -- doping profiles -- insulated gate bipolar transistors -- buffer layers; soft‐punch‐through buffer concept -- IGBTs -- SPT structure -- epitaxial layer -- lightly doped n‐type drift region -- n‐type substrate -- SPT buffer region -- doping concentration -- buffer regions -- insulated‐gate bipolar transistors -- thin wafer technology -- doping level -- buffer technology -- voltage 600.0 V to 1200.0 V; Power electronics -- Periodicals; 621.31705
• DOI: 10.1049/iet-pel.2019.0124
• Languages: English
• ISSNs: 1755-4535

Abstract

Abstract : A new soft‐punch‐through (SPT) buffer concept for 600–1200 V insulated‐gate bipolar transistors (IGBTs) based on thin wafer technology is proposed. The new SPT structure employs an epitaxial layer for the lightly doped n‐type drift region, which is grown on a thick starting material or substrate. The n‐type substrate serves as the SPT buffer region. The doping concentration of both drift and buffer regions are comparably low with the buffer region having a higher doping level. The design options of this new concept are discussed based on experimental data and 1200 V IGBTs using the new buffer concept are compared to IGBTs employing previously published buffer technology.